1. Field of the Invention
The present invention relates to a digital television receiver, and more particularly to a synchronization signal correcting apparatus for a digital TV.
2. Description of the Related Art
The introduction of a digital TV has allowed users to view images with a better picture quality. However, it is still necessary to view analog images using a digital TV. In comparison to a digital TV, an analog TV has imperfect signal characteristics and generates a large amount of errors in an image signal while converting from a mechanical signal such as in a video cassette recorder (VCR) into an electric image signal.
Accordingly, a time base correction has been proposed and used as a method to obtain a more stable image signal in a digital TV. However, while the time base correction of a digital TV can stabilizes an image signal, it cannot correct the synchronization (sync) of the input image. As a result, the time base correction allows an output of a stable image in space, but still an imperfect image in time during an output of a NTSC image.
Accordingly, an object of the present invention is to solve at least the problems and disadvantages of the related art.
An object of the present invention is to provide a more efficient digital TV.
Another object of the present invention is to provide a sync signal correcting apparatus in a digital TV which can compensate a difference between an input sync and a display sync that may be generated during a digital processing of an input analog image signal.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the objects and in accordance with the purposes of the invention, as embodied and broadly described herein, a sync signal correcting apparatus in a digital TV comprises a sync control signal generating unit for generating a sync control signal to lock a display sync of an image signal output from an image processing unit with a sync of an input image signal; and a sync signal correcting unit for correcting a sync signal of the image processing unit in accordance with the sync control signal generated from the sync control signal generating unit so that the output image signal to be displayed is synchronized with the input image signal.
In the above embodiment, the sync control signal generating unit is a NTSC pulse width modulation (PWM) generating unit. Also, the sync signal correcting unit may include a low pass filter (LPF) for low-pass-filtering the sync control signal generated from the sync control signal generating unit and outputting an analog level signal; a voltage controlled crystal oscillator (VCXO) for outputting a reference clock by varying an output frequency corresponding to the analog level signal low-pass-filtered through the LPF; and a phase locked loop (PLL) for generating a correction signal to compensate the sync of the output image signal to coincide with the sync of the input image signal in accordance with the reference clock varied by the VCXO.
In another embodiment of the present invention, a sync signal correcting apparatus in a digital TV comprises a NTSC PWM generating unit for generating a PWM signal to lock a NTSC signal in accordance with both a display sync output from an image processing unit and a NTSC field sync or vertical sync of an input NTSC image; a LPF for low-pass-filtering the NTSC PWM signal generated from the NTSC PWM generating unit and outputting an analog level signal; a VCXO for outputting a reference clock by varying an output frequency corresponding to the analog level signal low-pass-filtered through the LPF; and a PLL for generating a display clock to compensate a sync of an output image signal to coincide with a sync of an input image signal in accordance with the reference clock varied by the VCXO.
In still another embodiment of the present invention, a sync signal correcting apparatus in a digital TV comprises a NTSC PWM generating unit for generating a PWM signal to lock a NTSC signal in accordance with both a display sync output from an image processing unit and a NTSC field sync or vertical sync of an input NTSC image; a system time clock generating unit for generating a system time clock (STC) by feeding back a reference clock; a digital television (DTV) PWM generating unit for generating a PWM signal to lock a DTV signal in accordance with the STC and a program clock reference (PCR) signal input through a bit stream; a multiplexer (MUX) for selecting either the PWM signal generated from the NTSC PWM generating unit or the DTV PWM generating unit; a LPF for low-pass-filtering the PWM signal selected by the MUX and outputting an analog level signal; a VCXO for outputting a reference clock by varying its output frequency corresponding to the analog level signal low-pass-filtered through the LPF; and a PLL for generating a display clock to compensate a sync of an output image signal to coincide with a sync of an input image signal in accordance with the reference clock varied by the VCXO.
In still another embodiment of the present invention, a sync signal correcting apparatus in a digital TV comprises a NTSC PWM generating unit for generating a PWM signal to lock a NTSC signal in accordance with both a display sync output from an image processing unit and a NTSC field sync or vertical sync of an input NTSC image; a system time clock generating unit for generating a STC by feeding back a reference clock; a DTV PWM generating unit for generating a PWM signal to lock a DTV signal in accordance with the STC and a PCR signal input through a bit stream; a MUX for selecting either the PWM signal generated from the NTSC PWM generating unit or the DTV PWM generating unit according to a display mode signal; a LPF for low-pass-filtering the PWM signal selected by the MUX and outputting an analog level signal; a VCXO for outputting a reference clock by varying its output frequency corresponding to the analog level signal low-pass-filtered through the LPF; a PLL for generating a display clock to compensate a sync of an output image signal to coincide with a sync of an input image signal in accordance with the reference clock varied by the VCXO; a memory for storing the NTSC image and a clock input through the NTSC image, and a PLL or dividing unit for phase-matching or dividing the reference clock varied by the VCXO with or into a NTSC output clock.